The present specification relates generally to the field of signal generation for electronic devices. More particularly, the present specification relates to a frequency synthesizer.
U.S. Pat. No. 7,508,275, assigned to assignee of the present application, discusses frequency synthesizers as well as other electronic components. In general, fractional-N synthesizers can be utilized to provide one or more signals at a number of different frequencies. Generally, such systems utilize a phase locked loop (PLL) that includes a voltage controlled oscillator (VCO), a filter, a crystal oscillator, a fractional divider and a phase frequency detector. However, fractional-N synthesizers can be prone to providing spurious side band signals. An integer boundary spur or fractional spur can be caused by the carrier frequency of the PLL crossing over harmonics of the phase frequency detector sampling frequency. Spurious side band signals can degrade the performance of the device within which the frequency synthesizer is utilized. This performance degradation can be particularly problematic in wide bandwidth synthesizer applications.
Accordingly, there is a need for a frequency synthesizer that provides adaptable tuning and yet has reduced problems associated with spurious sidebands. Yet further, there is a need for a frequency synthesizer architecture that provides a high resolution, wide band frequency signals and avoids spurious signals. Yet further still, there is a need for a frequency synthesizer architecture that yields a highly integrated synthesizer that reduces size, weight, power, and complexity.